infoTECH Feature

November 05, 2009

Exar Selects Cadence as Mixed-Signal EDA Provider

Exar Corporation, which delivers highly differentiated silicon, software and subsystem solutions for industrial, datacom and storage applications, reportedly has signed an expanded business agreement to establish Cadence as its leading chip planning and mixed-signal design solutions provider.

"We have a longstanding relationship with Cadence as they have consistently provided the technology required for our project needs," said George Apostol, senior vice president and CTO, Exar (News - Alert) Corporation, in a release.

Apostol said the company has the technology leadership and outstanding technical support that is vital to helping to deliver highly differentiated silicon solutions to customers.

“Cadence tools, especially for mixed-signal designs, are ideal for our forthcoming data communications, storage, interface and power-management products," he added.

According to the release, Exar selected the Cadence Virtuoso platform for its analog and custom design and implementation technology.

The company will also use Cadence multi-mode simulation technology for RF, FastSpice, and mixed-signal simulations.

Company officials said that Exar will use the Cadence Encounter Digital Implementation System for digital design prototyping and floorplanning.

Exar has adopted the Cadence Chip Planning Solution as the standard for its IC conceptualization, analysis, and planning activities across the organization.

"Companies like Exar succeed through their ability to create highly differentiated designs, and are justifiably selective when it comes to the partners with whom they entrust their design flows," said Steve Carlson, vice president of marketing at Cadence.

Carlson said Cadence welcomes the opportunity for a long-term relationship with Exar, and the company looks forward to helping them further distinguish their products through technical innovation and rapid market introduction.

Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics.

In October Cadence Design Systems (News - Alert) had announced that it has delivered a comprehensive low-power design flow for engineers targeting the 65-nanometer process at Semiconductor Manufacturing International (News - Alert) Corporation.

Based on the Cadence Low-Power Solution, the flow enables faster design of leading-edge, low-power semiconductors using a single, comprehensive design platform.
 

Anil Sharma is a contributing editor for TMCnet. To read more of Anil’s articles, please visit his columnist page.

Edited by Patrick Barnard
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