Information Technology

October 29, 2009

Altera Ships Stratix IV GT FPGAs Featuring 11.3-Gbps Transceivers


Altera Corporation has reportedly started shipping its new Stratix IV GT EP4S100G2 field-programmable gate arrays, or FPGAs, which are integrated with 11.3-Gbps transceivers.
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In general, field-programmable gate array (FPGA) is an integrated circuit or a single chip device, which is configured by the customer or designer after manufacturing. Usually, the configuration is carried out using hardware description language (HDL). These single chip devices can be used to implement any logical function that an ASIC (application-specific integrated circuit) could perform.

In a press release, Luanne Schirrmeister, senior director of component product marketing at Altera (News - Alert), said "The increasing number of broadband subscribers worldwide is driving telecommunications equipment manufacturers to rapidly build out their 100G network infrastructure, and FPGAs are playing a vital role in enabling this build out."

Designed to meet the emerging IEEE (News - Alert) 802.3 standard, Stratix IV GT EP4S100G2 FPGAs are single-chip devices that have the capability to meet high-speed bandwidth requirements for -- next-generation framer, MAC, bridging and switching applications for 100-Gigabit Ethernet (GbE) and 100-gigabit optical transport networks (OTN).

Stratix IV GT EP4S100G2 features 36 transceiver channels operating from 2.488 Gbps to 11.3 Gbps, and also offers low jitter performance to meet 10G, 40G and 100G protocol specifications.

Moreover, the Stratix IV GT EP4S100G2 FPGA not only lowers system power, but also reduces board complexity and overall development costs, due to the fact that this single device consumes very low system power of 0.95-V -- and 24 of the 36 total transceivers operate at 11.3 Gbps. These integrated 11.3-Gbps transceivers eliminate the need for an external PHY, thereby providing direct interface or connection to the latest optical modules (10G, 40G or 100G).

Furthermore, Stratix IV GT EP4S100G2 FPGA features 230K logic elements (LEs), 13.9-Mbits internal RAM (News - Alert), and 1,288 18 x 18 multipliers. It has 1,067-Mbps (533-MHz) DDR3 memory interface and also features noise filtering with on-die and on-package decoupling.

To date, a wide range of customers have adopted Stratix IV GT FPGAs for use in 100G systems and platforms, such as 100G high-end test equipment, 100G Ethernet transport, 10 x 10 GbE aggregation, advanced wireline and military communications systems, and OTN applications.

Officials with Altera said the Stratix IV GT FPGAs have been selected by five of the top seven DWDM suppliers for their 100G developments. Moreover, high-density, high-performance 100G solutions facilitate communications systems designers, who are developing 100G systems, to accelerate their time to market as well as reduce risk compared to ASICs (application-specific integrated circuits), application specific standard products (ASSPs) and other currently available FPGA technologies.

Schirrmeister added: "As the first and only FPGA vendor shipping devices today with integrated 11.3 Gbps transceivers capable of meeting 100G system demands, Altera is leading the charge in enabling the deployment of 100G systems."

Jayashree Adkoli is a contributing editor for TMCnet. To read more of Jayashree's articles, please visit her columnist page.

Edited by Patrick Barnard

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