The company also announced that the SiP methodology has qualified with GUC production case and achieved good silicon correlation.
Supporting TSMC's most advanced process technology with advanced features, the TSMC Reference Flow 10.0 is said to address new design challenges.
"TSMC Reference Flow 10.0 enables designers to effectively use package design capability to deliver a more competitive component." said ST Juang, senior director of Design Infrastructure Marketing at TSMC.
"The integrated design approach reduces extra design margins used in modeling package effects, so customers can design their SiPs more systematically and ensure first time success for their product," added Juang.
The SiP Flow offers die-to-package co-design with comprehensive SiP design analysis such as component timing, IR drop, signal-integrity/simultaneous switching noise, and thermal analysis. Additionally, it is also said to provide die-to-package DRC/LVS verification solutions and electrical, physical design guideline. Reportedly, the SiP timing has been correlated to silicon data with high accuracy.
"We offer customers more design analysis and capability that include multiple die and package effects. This joint effort between TSMC and GUC also demonstrates our design leadership and differentiation from competitor's solution by showing robust SiP design capability, ensuring component success, not just die success," said Jim Lai, president and chief operating officer at GUC.
Follow ITEXPO (News - Alert) on Twitter: twitter.com/itexpoJai C.S. is a contributing editor for TMCnet. To read more of Jai's articles, please visit his columnist page.Edited by
Jessica Kostek