Virage Logic Corporation Extends Advanced IP Technology Leadership To The 32/28nm Process Node

The advanced IP technology leadership of Virage Logic Corporation has been extended to the 32/28-nanometer process node. The tape out of a product test chip with multiple IPs optimized for a high performance application for an early adopter customer was instrumental for the same. Virage Logic has also taped out multiple 32nm test chips at leading foundries. Virage Logic provides semiconductor intellectual property (IP) for the design of complex integrated circuits.

 

The early adopter customer selected Virage Logic due to its proven track record in the 40nm process technology. Virage Logic utilizes the power management capabilities of the SiWare Memory compilers and advanced embedded memory test and repair capabilities of the STAR (News - Alert) Memory System for the customer’s first 32/28nm chip.

 

According to Brani Buric, executive vice president of marketing and sales at Virage Logic, manufacturing challenges associated with new process nodes can impact overall design schedules and time to yield. Virage Logic has more than ten 40nm customers. This number itself proves that Virage Logic has the technology leadership and know-how to provide its customers with early access to IP that meets their SoC design performance, cost and yield/ramp to volume goals.

 

The SiWare product line addresses the complex design requirements that are placed on physical IP at advanced processes. The power-optimized memories for advanced processes minimize both static and dynamic power consumption and provide optimal yields. SiWare High-Density memory compilers designed to help designers achieve aggressive critical path requirements are also optimized to generate memories with the absolute minimum area.

 

SoC designers will be able to configure optimal solutions for their specific design requirements through compile-time options for process threshold variants, power saving modes, read and write margin extensions, ultra-low voltage operation, and innovative design for at-speed test.

 

Virage Logic's STAR Memory System fully supports all SiWare memories. The STAR Memory System is an embedded memory test and repair system that can be used with Virage Logic memories and other commercially available or internally developed memories. The STAR Memory System deploys foundry-developed eFuse for repair signature storage and also employs test algorithms designed for advanced processes for higher product reliability and accelerated time-to-yield.

 

SiWare Logic product line includes yield-optimized standard cells for design applications at 40nm with multiple threshold process variants. SiWare Logic libraries offer three separate architectures to optimize circuits for Ultra-High-Density, High-Speed, or general use.