Japan's Elpida Develops 65nm Chip Shrink

Elpida Memory, Inc., one of Japan’s leading global suppliers of Dynamic Random Access Memory, reportedly has developed a shrunken version of its 1-gigabit DDR2 SDRAM that delivers 20 percent more chips from a single 300mm wafer.

 

The company said that this represents a 60 percent increase in chips.

 

Elpida says it’s scheduled the volume production of the new shrunken chip before the end of this year. The production will be shared among Elpida’s Hiroshima Plant, its Taiwan-based Rexchip joint venture and its manufacturing partner PSC.

 

Elpida officials say that the chip size shrink was made possible by applying new architecture to first-generation 65nm process products. The company used its own 65nm process to estimate that costs for the shrunken version of 65nm products will be about 20 percent less compared to first-generation products.

 

The migration to 50nm process technology leads to higher wafer processing costs, due to the need for capital expenditures, so Elpida believes its new 65nm process-based chip will be cost competitive with 50nm products offered by other DRAM manufacturers.

 

Elpida has already reached the final stage of developing a 50nm process and plans to complete work next month. Upon completion of the work, Elpida plans to start volume production by late December.

 

The company expects that the migration to 50nm products having a chip size of below 40mm should enhance performance and reduce costs, because these products improve productivity by roughly 50 percent, compared with the 65nm shrunken version.

 

By leveraging the new chip shrink, Elpida can enjoy the flexibility of making capital spending decisions and picking manufacturing process composition in response to either prolonged sluggishness in the DRAM market or a relatively early recovery, says the company.