infoTECH Feature

January 03, 2012

Invensas Buys 73 Patents from MoSys

Invensas Corp., a subsidiary of technology licensor Tessera Technologies (News - Alert) Inc., has announced that it has purchased 73 memory chip technology patents from MoSys (News - Alert) Inc. for $35 million in cash.

MoSys, Inc. and Tessera Technologies signed a patent purchase agreement, under which Invensas bought 43 United States and 30 foreign memory technology patents from MoSys.

“The MoSys patents are very relevant to industry-standard DRAM products that have been shipping from the fabs of our potential licensees,” said Simon McElrea, president of Invensas, in a statement. “The MoSys transaction represents an important milestone in our ongoing acquisition program.”

According to the sources, MoSys has held back a royalty-free license to the patents to cover its Bandwidth Engine product line and technology partners, along with related rights to offer sublicenses to current and future partners.

“We are pleased with this transaction as it provides MoSys and its current licensees with continued access to the patents and allows us to strengthen our balance sheet,” stated Len Perham, president and chief executive officer, MoSys. “The combination of the retained license and the non-dilutive source of funding made this transaction very appealing.”

MoSys, Inc. is headquartered in Santa Clara, California, offering serial chip-to-chip communications solutions for next generation networking systems.

Its IP portfolio includes silicon proven SerDes and DDR3 PHYs supports wide range of data rates across a variety of standards and 1T-SRAM memory cores that provide a combination of high-density, low-power consumption, high-speed and low cost advantages for high-performance networking, computing, storage and consumer/graphics applications.

In other news, Invensas Corporation recently announced that it acquired the patent assets of ALLVIA, Inc. In addition, Invensas has entered into a two-year collaborative partnership with ALLVIA to further develop technology and intellectual property (IP) in the 3-dimensional integrated circuit (3D-IC) packaging space.



Jyothi Shanbhag is a contributing editor for TMCnet. To read more of Jyothi's articles, please visit her columnist page.

Edited by Jennifer Russell
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