Panasonic Corporation Selects Cadence Palladium XP Verification Computing Platform

Looking to ramp up the design time for Systems-on-Chip (SoC) solutions that are created for next-generation digital consumer products such as smart TVs and video recorders, Panasonic (News - Alert) Corporation has deployed the Cadence Palladium XP Verification Computing Platform, as part of the Cadence System Development Suite.

Panasonic was able to test complex functions and verify hardware-software integration using Palladium XP. Providing graphic validation capabilities of both hardware and software, specifically, the company was able to connect a validation environment to the Palladium XP system. The ability to verify its solutions at the system level gives Panasonic confidence it can deliver SoCs for industry-leading digital consumer solutions in tight time-to-market windows.

“With the rapid pace of innovation and deployment of application-driven devices, customers must have effective hardware-software development and scalable system verification solutions," said Christopher Tice, corporate vice president, System Design and Verification, System & Software Realization Group at Cadence. "Palladium XP, as part of the Cadence System Development Suite, enables companies like Panasonic to keep pace with today's market demands to effectively design, integrate, and verify the hardware and software for complex SoCs that drive next-generation consumer electronics.”

Enabling hardware-software system verification, Palladium XP unifies simulation, acceleration and emulation capabilities in a single environment. Consequently, customers like Panasonic can rapidly verify their complex SoC designs for cutting-edge consumer products. Digital consumer products, such as Smart TVs, must support advanced features like multi-channel decoding and display, and Internet access simultaneously. Necessitating tight integration between hardware and software, some functions require software execution, the company stated in a press release.

In June 2010, the company announced plans to use open-source reference flow for verification of SoC through using a Universal Verification Methodology standard. Engineers will now be able to adopt advanced verification techniques where the deployment effort and the risk get minimized and the time-to-market targets can be easily realized.