By NatheshCadence Design Systems (News
- Alert), a provider of hardware and software for integrated circuits and electronics, asserted that its newly launched Tempus Timing Signoff Solution is a static and timing analysis and closure tool that is designed to ease and fasten the development of complex ICs.
The new solution is said to deliver ten times faster timing analysis than traditional solutions and uses a new approach to remove the signoff bottleneck enabling chip developers to meet their power, performance and time-to-market goals.
The Tempus Timing Signoff Solution represents a significant advancement in timing signoff tool innovation and performance, leveraging multi-processing and ECO features to achieve signoff faster than with traditional flows and without compromising on accuracy, the solution can also handle designs with hundreds of millions of cell instances.
Lip-Bu Tan, president and chief executive officer at Cadence, said that “At Cadence, our mission is to help our customers build great, winning products. Achieving design closure on today’s complex SoCs is a significant challenge to hitting market windows. We developed the Tempus Timing Signoff Solution in collaboration with customers and ecosystem partners to address this challenge.”
Cadence also said that the Tempus Timing Signoff Solution passed TSMC’s rigorous EDA tool certification to enable customers to achieve accuracy required for advanced technologies, and for that TSMC certified it for 20 nm design.
Some of the notable features and benefits of the Tempus Timing Signoff solution are: full flat analysis capacity for designs in the hundreds of millions of instances; innovative MMMC ECO technology to accelerate signoff timing closure by weeks; maximum power, performance, and area (PPA) with pessimism reduction; massively distributed parallel timing engine scales to utilize up to hundreds of CPUs; and more.
Texas Instruments (News
- Alert), a semiconductor design & manufacturing company, said that while migrating towards more advanced process modes, timing closure becomes increasingly difficult and the company acknowledged that it is great to see Cadence taking on this challenge by providing a new technology designed to tackle tough design closure issues.