SMIC-Cadence Reference Flow Solution Enhances Low-Power 40-Nanometer Designs

Cadence Design Systems, Inc. recently announced its Encounter digital technology has been used by Semiconductor Manufacturing International (News - Alert) Corporation (SMIC) to develop a new low-power, advanced-node IC design reference flow, which incorporates SMIC's 40-nanometer manufacturing process.

This new reference flow has been created to provide design teams with a predictable and improved approach to complex SoC designs spanning an extensive range of low-power applications, as well as the latest in consumer electronics products which include devices such as tablets and smartphones.

“We have worked closely with Cadence to develop a reference flow that helps our customers accelerate and differentiate their low-power, high-performance chips,” said Tianshen Tang, vice president of SMIC Design Service. "By using this interoperable, low-power, Common Power Format-based flow from RTL to GDSII, design teams can achieve faster time-to-volume for advanced low-power 40-nanometer designs."

Based in China, SMIC boasts a Cadence flow that effectively automates designs through a set of advanced power management capabilities. The product successfully integrates with the Cadence RTL to GDSII flow. It includes the Encounter RTL Compiler, the Encounter Conformal Low Power, the Encounter Digital Implementation System, the Encounter Timing System and Encounter Power System, the Cadence QRC and Cadence CMP Predictor and the Cadence Physical Verification System.

"Cadence and SMIC have teamed to enable joint customers to benefit from a comprehensive set of digital technologies such as flat power aware implementation with timing and signal integrity closure, power domain aware physical synthesis, closed loop low-power verification and physical verification,” said John Murphy, group director, Strategic Alliances at Cadence. “By using this proven flow with the 40-nanometer SMIC manufacturing process, customers have a differentiated approach to low-power design that can get them to market faster with lower power consumption."