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May 31, 2011

TSMC Selects Atrenta to Deploy Soft IP Qualification Program

Atrenta has announced the deployment of a comprehensive soft IP qualification program using Atrenta’s SpyGlass platform and a targeted subset of its GuideWare reference methodology in TSMC’s IP quality assessment program.

“TSMC has chosen Atrenta to help implement its forward-looking soft IP qualification program,” said Dr. Ajoy Bose, chairman, president and CEO at Atrenta

To TSMC’s customers, the program aims to provide quantitative information about the robustness and completeness of synthesizable semiconductor IP, which is part of the TSMC 9000 IP library.

Atrenta has formed IP Handoff Package by integrating all the software and methodologies needed to implement TSMC’s IP qualification requirements, according to company officials.

Moreover, for soft or synthesizable IP handoff, TSMC is using the SpyGlass register transfer level (RTL) analysis and optimization product suite. Company officials said that to qualify for handoff, the IP must be verified for language syntax and semantic correctness, simulation-synthesis mismatches, electrical and connectivity rules. In addition, it also must be verified for power consumption, synchronization of clock domain crossing paths, stuck-at and at-speed test coverage and timing constraints.

Automatically generated Atrenta DashBoard and DataSheet reports are also required for the IP handoff. Company officials said that they capture the results of thee SpyGlass tests in easy to read and track HTML format.

Over the past nine months, Atrenta, working with TSMC, has refined the specific tests to be performed and optimized the format of the DashBoard and DataSheet reports. TSMC said that all soft IP providers should reach a minimum level of completeness, as documented by the DashBoard and DataSheet reports, before their IP is listed on TSMC online.

“We have worked closely with Atrenta to refine the process of validating the delivered quality of soft IP from our ecosystem partners,” said Suk Lee, director for Design Infrastructure Marketing Division at TSMC, adding that the capability that the company is now putting into production is expected to provide valuable information regarding soft IP quality for end customers.

Starting with the Atrenta GuideWare reference methodology, both the companies have defined a subset of the methodology which is targeted at verifying the quality and completeness of soft IP design blocks.

Additionally, this methodology has been packaged along with training materials, a test IP design and the scripts necessary to analyze the IP and generate the DashBoard and DataSheet reports.

Atrenta is a provider of SoC Realization solutions for the semiconductor and electronic systems industries.

Recently, the company in collaboration with imec’s 3D integration IIAP (industrial affiliation program) jointly developed an advanced planning and partitioning design flow for heterogeneous 3D stacked ICs.

Anshu Shrivastava is a contributing editor for TMCnet. To read more of Anshu’s articles, please visit her columnist page.
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