Imperas and OVP Support ARM Cortex-M Cores

Imperas, released its first models of the Cortex family of processor cores from ARM (News - Alert). Models of the M-series of cores are now available from Open Virtual Platforms (OVP), including example virtual platforms incorporating the cores and support for the cores in Imperas' advanced software development tools.

These models will be used by Imperas with Cadence Design Systems (News - Alert) to deliver on the EDA360 vision for System Realization.

Imperas is a company providing Virtual Platform and Virtual Prototyping solutions. By adopting Imperas virtualized software development tools, embedded products can be completed sooner, cheaper, and with higher quality.

The models of the ARM Cortex processor cores, as well as models of the other ARM processors including the ARM7, ARM9, ARM10 and ARM11 families, work with the Imperas and OVP simulators, and show fast performance of hundreds of millions of instructions per second.

"Virtual platforms provide the visibility and controllability we need for our development projects," stated Christian Gehrmann of the Sweden Institute of Computer Science, in a press release. "OVP, with its performance, ease of use, and library of the latest ARM processor core models, has been an excellent tool for us in our projects."

All OVP processor models are instruction accurate, and very fast, focused on enabling embedded software developers, especially those building hardware-dependent software such as firmware and bare metal applications, to have a development environment available early to accelerate the software development cycle.

Virtual platforms utilizing these OVP processor models can be created with the OVP peripheral and platform models, or the processor models can be integrated into SystemC/TLM-2.0 based virtual platforms using the native TLM-2.0 interface available with all OVP models. The OVP simulator also has an integration with the Eclipse IDE, for easy use for software developers. Also, working with the OVP simulator, these models work with the Imperas advanced tools for multicore software verification, analysis and debug, including key tools for software development on virtual platforms.

"We are using OVP virtual platforms for architecture exploration and as a development vehicle for firmware," commented Maxime de Nanclas, president of Nuum Design Inc., in a statement. "We found that bringing up a real time operating system and application software on our OVP virtual platform with an ARM processor core model was easier and faster than working with hardware development boards."

Cadence recently articulated an industry vision, EDA360, which talks to application-driven system development. Imperas has joined the Cadence System Realization Alliance; its technology, including OVP and Imperas' advanced software development tools, has been integrated with Cadence Incisive Enterprise Simulator and Incisive Software Extensions products.

"Addressing system development needs will require collaboration and partnerships, and we are excited to have Imperas as a member of the System Realization Alliance," said Michal Siwinski, group director of product management for System Realization at Cadence, in a statement. "Their Open Virtual Platforms technology, model creation tools and the large library of fast processor core models complements Cadence System Realization offerings to provide an effective solution for system and software development."