Freescale and Nepes Partner to Manufacture Redistributed Chip Packaging Technology

Freescale Semiconductor, a manufacturer of embedded semiconductors for the automotive, consumer, industrial and networking markets, announced that it had signed a licensing agreement with Nepes Corporation, a Korean semiconductor parts and materials specialist, who will manufacture Freescale's (News - Alert) redistributed chip packaging or “RCP” technology in a lower cost 300mm format.

Nepes has already installed the 300mm equipment set and manufacturing process capable of multiple layer single-die and multi-die system-in-package solutions in its Singapore facility earlier this year.

Freescale and Nepes are also collaborating to further enhance the capabilities of the redistributed chip packaging or “RCP” technology, company officials said.

Ken Hansen, senior fellow, vice president and chief technology officer at Freescale, said, "Our joint development collaboration will also allow us to offer our customers compelling solutions for single die, 2D and 3D systems-in-package targeted at a broad range of industries and applications."

According to Esdy Baek, senior vice president and chief of the global business center at Nepes, the company will be able to provide packaging solutions to the market through licensing and the ongoing joint development of RCP.

Freescale that had developed and introduced the ball grid array or “BGA” packaging technology had announced the RCP technology in 2006.

The RCP eliminated some of the limitations of the previous packaging technologies by discarding higher cost wire bonds, package substrates and flip chip bumps. RCP integrates semiconductor packaging as a functional part of the die and system solution. 

To optimize the size of the package, cost, performance and die size range of I/O, RCP accommodates single and multiple routing layers.

RCP does not utilize blind vias or require thinned die to achieve thin profiles. These features simplify assembly, lower costs and provide compatibility with advanced wafer manufacturing processes utilizing low-k interlayer dielectrics, the company said.

The solutions for sensitive analog devices and digital platforms are obtained from RCP fan-out package. The technology is compatible for both the small and large package sizes.

RCP enables low cost because of the elimination of wirebonds, large batch process and simple assembling. The die size can be reduced because of the improvement in packaging.

Due to the shortened routing distances and reduced contact resistance in the RCP the electrical performance can be improved. It is halogen and lead-free and RoHS complaint.

The RCP technology provides single-die, multi-die SiP, stacked packages and other 3D integrated packaging solutions.

In another recent development at the Global Technology (News - Alert) Conference,GLOBALFOUNDRIES and Freescale Semiconductor announced plans to bring a new class of thin film storage or “TFS” flash memory products to market on 90nm technology.