Cadence Launches Palladium XP for Single Computing Verification

Cadence Design Systems (News - Alert), the leader in global electronic design innovation, announced the first fully integrated high-performance verification computing platform, Palladium XP, which unifies simulation, acceleration and emulation into a single verification environment.

Developed to support next-generation designs, the highly scalable Palladium XP verification computing platform lets design and verification teams bring up their hardware/software environment faster and produce better quality embedded systems in a shorter time.

'The verification and hardware-software integration challenges of new system designs in the wireless, multimedia and networking markets are growing in complexity. By bringing together the best in Cadence simulation, acceleration and emulation technologies, we are delivering a unique platform that excels in bring-up time, ease of use, scalability and turnaround time,' said Ran Avinun, product management group director for system design and verification at Cadence.

Cadence Palladium XP supports design configurations up to 2 billion gates, delivering performance up to 4MHz and supporting up to 512 users simultaneously. The platform also provides unique system-level solutions, including low-power analysis and metric-driven verification.

'Cadence Palladium XP helps us design, verify and integrate the hardware and software components of our advanced graphics processing unit (GPU) better than ever to stay at the top of our game," Narendra Konda, director of engineering, NVIDIA (News - Alert) said. 

The Palladium XP verification computing platform provides developers a high-fidelity representation of their design so they can quickly and confidently locate and fix bugs, resulting in better-quality IP, subsystems, SoCs and system.

'With the introduction of multicore IP platforms, ARM (News - Alert) and our customers are facing new design requirements to integrate and run complex CPU sub-systems with software,' said Dr. John Goodenough, worldwide director of design technology at ARM.

'Like its predecessor, the Palladium XP verification computing platform will be a valuable validation tool for these advanced designs. Our initial trials have shown that the Palladium XP runs current ARM workloads out of the box, with the additional ability to trade off domain utilization for higher performance,' Goodenough added.

Design teams can 'hot swap' simulation with acceleration and emulation in a scalable verification environment as needed, which speeds the verification process and enables early access to testing embedded software and evaluating performance implications of different IP and/or system architectures. The Palladium XP verification computing platform is available now worldwide. It is offered in two configurations, XL for design teams, and GXL for enterprise-class global teams.

In another development, Cadence announced that that VIA (News - Alert) Technology's microprocessor subsidiary, Centaur Technology, achieved significant quality and time-to-market benefits by using the Cadence(R) Virtuoso(R) Space-Based Router on its latest set of processors, 65-nanometer Nano 3000 Series.