infoTECH Feature

September 21, 2011

Cadence Launches Dfi 3.0-compliant Design along with Verification IP

Cadence Design Systems (News - Alert), Inc. a leading name in international electronic design innovation, recently announced that it would offer a complete suite of solutions that would support latest DDR PHY Interface (DFI) 3.0 specification. This was also announced by the DFI Technical Group.

This particular specification clearly defines an interface protocol between DDR memory controllers and PHYs. This is what helps in the creation of chips and systems that support the emerging DDR4 memory standard. Cadence now supports the specification across all its DDR DRAM Controller IP, DDR PHY IP, and has made it a part of the Cadence Verification IP Catalog. Cadence is also credited with introducing the first DDR4 IP memory solution earlier this year.

In a release, Marc Greenberg, Director of Marketing, SoC Realization, Cadence says, "Our customers require DFI-compliant design and verification IP that will enable them to be first to market with next-generation SoCs that support the emerging DDR4 standard. Our close working relationship with the DFI Technical Group ensures that we offer integration-ready DFI solutions when the specification becomes available."

Designers are constantly looking for ways to reduce the time-to-market and the subsequent cost of their SoCs and it is in this light that DFI interface adoption continues to rise. Cadence has around 400 design wins especially for DDR controllers and PHYs. And currently all DDR3 designs that are in development are using the DFI interface. This results in DFI 3.0 support being critical to customers who will have to deliver solutions supporting the emerging DDR4 standard.

With proposed data rates up to 3.2 Gbits/second per pin, DFI 3.0 has set new standards of interfacing to DDR4 devices. These figures make it more than 50 percent faster than the present DDR3 standard. It also works as an extension to low-power interface that came with DFI 2.1.

Cadence is about enabling international electronic design innovation and has a central role in the creation of present day integrated circuits as well as electronics. Users work with Cadence software, hardware, IP, and services to help design and verify advanced semiconductors, consumer based electronics, networking and telecommunications based equipment as well as computer systems. The company is headquartered in San Jose, California with a global presence.

Carolyn John is a Contributor to TMCnet. To read more of her articles, please columnist page.

Edited by Rich Steeves

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