To address customer need for a streamlined solution for efficient product creation, Cadence Design Systems (News - Alert), a semiconductor design innovator, recently released version 16.6 of Allegro printed circuit board (PCB) technology.
The upgraded version will be made available by Q4 2012, Cadence said in a statement.
Coming with enhanced miniaturization capabilities for embedding dual-sided and vertical components, Allegro 16.6 is capable of accelerating timing closure for high-speed interfaces by 30-50 percent. With improved ECAD and mechanical CAD (MCAD) co-design, the upgraded version facilitates timing-aware physical implementation and verification in the industry's first electrical CAD (ECAD) team collaboration environment for PCB design, using Microsoft (News - Alert) SharePoint technology.
The Allegro suite's leading PCB design miniaturization capabilities were first introduced in 2011. The Allegro 16.6 product suite helps embed active and passive components to address the specific design requirements associated with ever shrinking board size.
Components can now be embedded vertically on an inner layer of a PCB leveraging the Z-axis, which greatly reduces X- and Y-axis real estate on the board.
“As chip designers are tasked with developing increasingly complex products with tight time-to-market deadlines, having quick and easy access to design teams and resources both locally and globally creates a real competitive advantage,” said Simon Floyd, director of innovation and product lifecycle management solutions at Microsoft. “The Cadence PCB design tools, integrated with SharePoint, provide a unique environment that promotes team collaboration, design creation and control, and significant productivity improvements.”
“Our leading ECP(C) technology meets customer needs for cost-effective miniaturization of PCBs. Cadence and AT&S have been partnering together for a number of years now, addressing our joint customers' needs for advanced miniaturization techniques,” said Mark Beesley, COO of Advanced Packaging at AT&S.
Cadence Design Systems recently launched the Cadence OrCAD 16.6 PCB design solution with new features, enhanced customization capabilities, and 20 percent simulation performance improvements that provide customers a shorter, more predictable path to product creation. Additionally, a new signal-integrity flow introduces a higher level of automation that gives usability and productivity benefits for circuit simulation of performance-driven digital circuits, requiring pre-layout topology and constraint exploration and development for high-speed design.
A few months ago, Cadence acquired Sigrity, Inc., a leading signal and power integrity technology provider. The acquisition enabled the company to integrate Sigrity analysis technologies with Cadence Allegro and OrCAD design tools to provide a comprehensive front-to-back integrated flow to enable system and semiconductor companies to deliver high-performance devices that employ gigabit interface protocols such as DDR and PCI (News - Alert) Express.
The integrated solution has been designed to particularly benefit customers delivering electronic systems in high-growth markets such as mobile multimedia devices and cloud computing infrastructure.
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