Artesis to Provide FlexNoC Network-on-Chip Interconnect Fabric IP to Cavium Networks

Arteris Inc., the inventor and leading supplier of network-on-chip (NoC) interconnect IP solutions, has signed an agreement with Cavium Networks (News - Alert), a leading provider of highly integrated semiconductor products, to provide Arteris' FlexNoC network-on-chip interconnect fabric IP.

Often called "a front-end solution to a back-end problem," the technology enables SoC designers to achieve faster operating frequencies than traditional SoC interconnects, while simultaneously providing lower power consumption, higher memory bandwidth and optimized latencies by individual connections. Moreover, it also improves SoC performance, lowers SoC costs and enables rapid adoption of IPs communicating in any protocol.

"We are pleased to license Arteris' network on chip interconnect products," said Farhad Mighani, Senior Director of ASIC Development at Cavium Networks, in a press release.

"Cavium's purchase of Arteris' FlexNoC network-on-chip IP and memory scheduler products after such a thorough technical evaluation demonstrates Arteris' capability to deliver the best performing and most scalable interconnect solution to SoC customers," said K. Charles Janac, President and CEO of Arteris, in a press release. "We are proud that Cavium Networks has chosen Arteris FlexNoC to meet their SoC interconnect needs."

Arteris, Inc. provides Network-on-Chip interconnect IP and tools to accelerate System-on-Chip semiconductor (SoC) assembly for a wide range of applications. Arteris Inc. and CEVA, Inc., announced that Arteris has joined the CEVAnet partner program, bringing multi-core interconnect expertise to the comprehensive third-party technology offerings for CEVA (News - Alert) DSP cores. CEVA has also licensed Arteris' advanced FlexNoC interconnect IP for optimizing CEVA's future multi-core platforms.

Seeing the challenge for interconnect architecture and its scalability to deliver greater levels of performance at the lowest power consumption achievable, CEVA and Artesis have joined hands to bring Arteris' advanced FlexNoC interconnect IP together with CEVA's industry-leading DSP cores in a highly-optimized, high performance multi-core solution. CEVA is a global licensor of silicon intellectual property (SIP) DSP Cores and platform solutions for the mobile handset, portable and consumer electronics markets.

Rahul Arora is a TMCnet contributor. He has worked as an editor and freelance writer for several reputed organizations in India. To read more of his articles, please visit his columnist page.

Edited by Rich Steeves