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TMCNet:  Silicon Labs Launches Industry's Lowest Jitter Clock Family for Data Centers and Internet Infrastructure

[August 04, 2014]

Silicon Labs Launches Industry's Lowest Jitter Clock Family for Data Centers and Internet Infrastructure

(ENP Newswire Via Acquire Media NewsEdge) ENP Newswire - 04 August 2014 Release date- 31072014 - AUSTIN, Texas - Silicon Labs (NASDAQ: SLAB), a leader in high-performance, analog-intensive, mixed-signal ICs, today introduced the industry's most frequency-flexible clock solutions offering industry-leading jitter performance for high-speed networking, communications and data center equipment serving as the foundation of today's Internet infrastructure.

Silicon Labs' next-generation Si534x 'clock-tree-on-a-chip' portfolio includes high-performance clock generators and highly integrated multi-PLL jitter attenuators. These single-chip, ultra-low-jitter timing devices combine clock synthesis and jitter attenuation functionality to reduce the cost and complexity of optical networking, wireless infrastructure, broadband access/aggregation, Carrier Ethernet, test and measurement, and enterprise/data center equipment including edge routers, switches, storage and servers.

Skyrocketing demands for bandwidth and the growing complexity of Internet infrastructure and data center systems are driving the need for a wide variety of clocks at different frequencies, signaling formats and voltage levels. Jitter performance requirements to support the highest data rates for 10/40/100G networks are also very demanding. Given the limited flexibility and integration of traditional clock solutions, hardware designers are often forced to use a costly and complicated combination of clock generators, jitter attenuators, oscillators and buffers to complete their clock trees.

To address this industry need, Silicon Labs' new Si534x jitter attenuators and clock generators leverage industry-leading frequency flexibility and clock-tree-on-a-chip integration to deliver an efficient, cost-effective solution that combines all discrete timing functions into a single-chip clock IC solution.

Silicon Labs' Si5347/46/45/44/42 jitter attenuators and Si5341/40 clock generators provide an I2C-configurable platform with an industry-leading combination of frequency translation capabilities and best-in-class jitter performance ( (c) 2014 Electronic News Publishing -

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