|[April 07, 2014]
Tanner EDA Completes Analog/Mixed-signal Flow with Digital Place and Route in Release v16.1 of HiPer Silicon Design Suite
MONROVIA, Calif. --(Business Wire)--
Tanner EDA, the catalyst for innovation and leader for design, layout
and verification of analog and mixed-signal (A/MS) integrated circuits
(ICs), has released version 16.1 of the company's HiPer Silicon™ design
suite. New products include a digital place and route tool, SDL
enhancements, and support for LEF/DEF exchange formats and SDF timing
extraction. The HiPer
Silicon v16.1 design suite delivers unprecedented interoperability
and a complete analog/mixed-signal end-to-end flow, making Tanner EDA
the price/performance industry alternative for IC design teams. New
capabilities in v16.1 include:
New capabilities for front-end (schematic capture, simulation, waveform
Enhanced mixed-signal co-simulation.
Enhanced cross-probing between layout, schematic and in-simulation
Advanced waveform comparison tool.
New capabilities for back-end (layout):
New digital place and route tool for mixed-signal designs.
Support for the LEF/DEF exchange formats, and SDF timing extraction.
Verify advanced parasitic extraction.
Enhanced interoperability with third-party layout tools through
Support for the OASIS mask interchange format.
SDL connectivity extractor and short/open checker.
"Version 16.1 adds additional productivity enhancements to HiPer
Silicon," said Greg Lebsack, Tanner EDA's president. "New capabilities
in front end and back end, and the release of our digital
place-and-route, provides designers a complete analog and digital flow.
The release reaffirms our ongoing commitment to offer customers the best
possible price/performance for their complete mixed-signal design flow."
Pricing and Availability
HiPer Silicon v16.1 is available for the Windows® and Linux operating
systems. For additional information, visit the Tanner EDA website at www.tannereda.com,
contact Tanner EDA Sales by phone (626-471-9701), or email firstname.lastname@example.org.
About Tanner EDA
Tanner EDA provides a complete line of EDA software solutions that drive
innovation for the design, layout and verification of analog and
mixed-signal (A/MS) integrated circuits (ICs) and MEMS. Customers are
creating breakthrough applications in areas such as power management,
displays and imaging, automotive, consumer electronics, life sciences,
and RF devices. A low learning curve, high interoperability, and a
powerful user interface improve design team productivity. Tanner EDA is
the price/performance leader and the industry alternative for a complete
design flow, improving total cost of ownership (TCO) and reducing EDA
tool expense for its global customers. Capability and performance are
matched by unparalleled customer support as well as an ecosystem of
partners that bring advanced capabilities to A/MS designs.
Founded in 1988, Tanner EDA solutions deliver just the right mixture of
features, functionality and usability. The company has shipped over
33,000 licenses of its software to more than 5,000 customers in 67
HiPer Verify, HiPer Silicon, Tanner Tools, L-Edit, S-Edit and W-Edit
are trademarks of Tanner Research, Inc. Any other trademarks or trade
names mentioned are the property of their respective owners.
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