Tanner EDA Releases HiPer Silicon Full-flow Design Suite v16
Mar 11, 2013 (Close-Up Media via COMTEX) --
Tanner EDA announced the release of version 16 of the company's HiPer Silicon full-flow design suite.
The Company reported that the new version offers designers a complete analog and mixed-signal design flow from digital (HDL) and analog (Spice, Verilog-A) electrical design and simulation, through synthesis to physical layout and verification. HiPer Silicon v16 contains new features and functionality, including:
New capabilities for back-end (layout):
-OpenAccess database support for PDK and EDA tool interoperability
-Collaborative design / multi-user design control for enhanced team productivity
-Improved file loading and rendering speeds
-Improved performance of physical verification (HiPer Verify)
New capabilities for front-end (schematic capture, simulation, waveform viewing):
-Integrated mixed-signal simulation (Verilog-AMS co-simulation)
-Parametric plots, scatter plots and improved text control and graphics manipulation
"The adoption of OpenAccess for L-Edit offers analog, mixed-signal and MEMS designers greater flexibility and the opportunity to integrate our hallmark layout tool into large design environments," said Greg Lebsack, Tanner EDA's president. "Our commitment to interoperability and integration with ecosystem partners is part of our twenty-five year heritage as an EDA tool provider; it's an essential part of our company DNA."
Tanner EDA provides a complete line of software solutions that drive innovation for the design, layout and verification of analog and mixed-signal (A/MS) integrated circuits (ICs) and MEMS.
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