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MEDIA ALERT: Real Intent to Exhibit, Participate in Panel and Present Tutorial at DVCon 2013
SANTA CLARA, CA, Feb 19, 2013 (MARKETWIRE via COMTEX) --
Who
Real Intent, whose advanced verification solutions accelerate
electronic design sign-off, eliminate complex failures in SoCs, and
lead the market in performance, capacity, accuracy and completeness.
What
Will participate in a lively industry panel, present a joint ½-day
tutorial with Calypto Design Systems and DeFacTo Technologies, and
exhibit its products at the Design & Verification Conference &
Exhibition (DVCon 2013) -- the premier conference for functional
design and verification.
-- Panel: Where Does Design End and Verification Begin Real Intent CTO
Pranav Ashar, along with John Goodenough of ARM, Inc., Harry Foster of
Mentor Graphics Corp., Oren Katzir of Intel Corp., and Gary Smith of
Gary Smith EDA comprise the panel moderated by Brian Hunter of Cavium,
Inc.
-- Tutorial: Pre-Simulation Verification for RTL Sign-Off. Abstract
modeling and pre-simulation static analysis of RTL have become
imperative in SOC design flows to reduce testing costs and ensure no
critical tests are missed. Integrating heterogeneous IP and design units
requires confirmation of protocols, power budgets, testability and the
correct operation of multiple interfaces and clock domain crossings
(CDC). This tutorial covers power exploration, analysis and optimization
using an abstract model with high-level synthesis (HLS), followed by RTL
static verification for: syntax and semantic checking (lint);
constraints planning and management; reset analysis and optimization;
automatic intent verification; CDC sign-off; DFT analysis and insertion;
and X-analysis and optimism/pessimism correction.
-- Exhibit: Real Intent will show its Ascent products for early functional
verification prior to synthesis, and Meridian products for advanced
sign-off verification not possible with simulation or static timing
analysis.
When/Where
Panel:
Wednesday, Feb. 27, 2013, 8:30 -10 a.m., Oak Ballroom
Tutorial:
Thursday, Feb. 28, 2013, 1:30-5 p.m., San Jose/Santa Clara Room
Exhibit:
Tuesday, Feb. 26 and Wednesday, Feb. 27, 2013, 3:30-6:30 p.m.
at the Doubletree Hotel, San Jose, Calif.
About Real Intent
Companies worldwide rely on Real Intent's EDA software to accelerate
early functional verification and advanced sign-off of electronic
designs. Real Intent's comprehensive CDC verification, advanced RTL
analysis and sign-off solutions eliminate complex failure modes of
SoCs, and lead the market in performance, capacity, accuracy and
completeness. Please visit www.realintent.com for more information.
Meridian and Ascent are trademarks of Real Intent, Inc. All other
trademarks and trade names are the property of their respective
owners.
Press contact:
Sarah Miller
Real Intent
ThinkBold Corporate Communications
231-264-8636
sarah@thinkbold.com
SOURCE: Real Intent
mailto:sarah@thinkbold.com
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